Product Details
Art of Analog Layout, The

Art of Analog Layout, The
By Alan Hastings

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Product Description

For courses in Analog Layout. The first textbook in the field. This text provides students with a broad understanding of the issues involved in successfully laying out analog integrated circuits-ranging from the mechanics of layout to essential information about many related areas, such as device physics, processing, failure modes and effects, device operation, parasitics, and matching. It emphasizes practical knowledge.


Product Details

  • Amazon Sales Rank: #2057148 in Books
  • Published on: 2000-10-18
  • Original language: English
  • Binding: Hardcover
  • 539 pages

Editorial Reviews

Book Info
(Pearson Education) Provides layout designers with broad coverage of the issues involved in successfully laying out analog integrated circuits. Keeps mathematics to a minimum, provides a carrier-based model for understanding device operation, and offers many exercises that can be done with paper and pencil instead of software. DLC: Integrated circuits--Design and construction.

From the Back Cover

Based on the author's extensive experience as a circuit designer and a layout designer, The Art of Analog Layout takes a practical and authoritative perspective, providing the reader with broad coverage of the issues involved in successfully laying out analog integrated circuits. Topics range from the mechanics of layout to essential information about many related areas, such as device physics, processing failure modes and effects, device operation, parasitics, and matching. The emphasis throughout is on practical knowledge.

  • Written for layout designers, the mathematics is kept to a minimum, requiring only a familiarity with basic algebra and elementary electronics.
  • Provides a carrier-based model for understanding device operation.
  • Focuses on three processes: standard bipolar, polysilicon-gate CMOS, and analog BICMOS, enabling the reader to comprehend most new processes.
  • Discusses the ways in which variations in layout geometries affect the performance of devices fabricated in silicon.
  • Many exercises can be completed using pencil and paper for those who do not have access to layout editing software.